Journal of Electronic Testing

Editorial

Vishwani D. Agrawal

Test Technology Newsletter

Physics-Based Low-Cost Test Technique for High Voltage LDMOS

Sukeshwar Kannan, Kaushal Kannan, Bruce C. Kim, Friedrich Taenzler, Richard Antley, Ken Moushegian, Kenneth M. Butler, Doug Mirizzi

Online Testable Approaches in Reversible Logic

N. M. Nayeem, J. E. Rice

Autonomous Fault-Tolerant Systems onto SRAM-based FPGA Platforms

Cristiana Bolchini, Antonio Miele, Chiara Sandionigi

Effective Timing Error Tolerance in Flip-Flop Based Core Designs

Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni, Petros Xarchakos

A Fault Tolerant Approach for FPGA Embedded Processors Based on Runtime Partial Reconfiguration

Alexandros Vavousis, Andreas Apostolakis, Mihalis Psarakis

Selective SWIFT-R

Felipe Restrepo-Calle, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Antonio Jimeno-Morenilla

MoDiVHA: A Hierarchical Strategy for Distributed Test Assignment

Jefferson P. Koppe, Elias P. Duarte Jr., Luis C. E. Bona

Efficient Test Compression Technique for SoC Based on Block Merging and Eight Coding

Tie-Bin Wu, Heng-Zhu Liu, Peng-Xia Liu

Survey and Evaluation of Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling

Likun Xia, Muhammad Umer Farooq, Ian M. Bell, Fawnizu Azmadi Hussin, Aamir Saeed Malik

Multi-bit Sigma-Delta TDC Architecture with Improved Linearity

Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Daiki Hirabayashi, Yuta Arakawa, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuji Yano, Tatsuhiro Gake, Takahiro J. Yamaguchi, Nobukazu Takai

Low Cost Time Efficient Multi-tone Test Signal Generation Using OFDM Technique

Tian Xia, Rohit Shetty, Timothy Platt, Mustapha Slamani

Preserving Hamming Distance in Arithmetic and Logical Operations

Shlomi Dolev, Sergey Frenkel, Dan E. Tamir, Vladimir Sinelnikov